kontrolnaya_Tsifrovaya_obrabotka_signalov


Федеральное государственное бюджетное образовательное учреждение
высшего образования
«Ижевский государственный технический университет
имени М.Т. Калашникова»
Кафедра «Проектирование и технология производства приборов»
Отчет по контрольной работе
по дисциплине «Цифровая обработка сигналов»
Выполнил:магистрант группы ППТП
Никитина А.А.
Принял:
Загидуллин Ю.Т.
Ижевск, 2016
Задание: разработать программу обнаружителя синусоидального сигнала с частотой f0 из диапазона от 0 до fmax. Предусмотреть контроль границ уровня сигнала от Umin до Umax, внутри диапазона индикация не должна срабатывать.
Данные:
f0 = 2 кГц;
fmax = 4 кГц;
Umin = 0,5 В;
Umax = 2,7 В.
Ход работы
Расчеты
fд=2*fmax=8 кГц∆f=fд1024=8*1031024=7,8125 ГцLLevel=Umin*4095Uvcc=0,5*40953,3=26СHLevel=Umax*4095Uvcc=2,7*40953,3=D16CNTR=fHCLKfд=78 МГц8 кГц=9750n0=f0±10Гц∆f=255257Листинг программы
/**
******************************************************************************
* @file Examples/MDR32F9Q3_EVAL/ADC/AnalogWatchdog/main.c * @author Milandr Application Team
* @version V1.2.0
* @date 12/09/2011
* @brief Main program body. ******************************************************************************
* <br><br>
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, MILANDR SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*
* <h2><center>&copy; COPYRIGHT 2011 Milandr</center></h2>
*/
/* Includes ------------------------------------------------------------------*/
#include "MDR32F9Qx_config.h"
#include "MDR32Fx.h"
#include "MDR32F9Qx_port.h"
#include "MDR32F9Qx_rst_clk.h"
#include "MDR32F9Qx_adc.h"
#include "MDR32F9Qx_it.h"
#include "arm_math.h"
#include "arm_const_structs.h"
/** @addtogroup __MDR32F9Qx_StdPeriph_Examples MDR32F9Qx StdPeriph Examples
* @{
*/
/** @addtogroup __MDR32F9Q3_EVAL MDR32F9Q3 Evaluation Board
* @{
*/
/** @addtogroup ADC_AnalogWatchdog_93 ADC_AnalogWatchdog * @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
#defineNfft1024
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
__IO uint32_t H_Level = 0xD16;
__IO uint32_t L_Level = 0x26C;
PORT_InitTypeDef PORT_InitStructure;
ADC_InitTypeDef sADC;
ADCx_InitTypeDef sADCx;
q15_tInputBuffer[Nfft];
q15_tInputBuffer2[2*Nfft];
intInputSampleCounter=0;
intReadyToProcess=0;
float32_t testInput_f32[2*Nfft];
uint32_t fftSize = Nfft;
uint32_t ifftFlag = 0;
uint32_t doBitReverse = 1;
float32_t testOutput[Nfft];
float32_t maxValue;
uint32_t testIndex = 0;
int i;
/* Private function prototypes -----------------------------------------------*/
void GetResault(void);
/* Private functions ---------------------------------------------------------*/
void GetResault(void)
{
//PORT_SetBits(MDR_PORTF, PORT_Pin_1);
InputBuffer[InputSampleCounter]=(q15_t)ADC1_GetResult()&0xFFF;
InputSampleCounter++;
if (InputSampleCounter==Nfft)
{
ReadyToProcess=1;
InputSampleCounter=0;
}
//PORT_ResetBits(MDR_PORTF, PORT_Pin_1);
}
/**
* @brief Main program.
* @param None * @retval None */
#ifdef __CC_ARM
int main(void)
#else
void main(void)
#endif{
RST_CLK_DeInit();
/* Enable HSI clock source */
// RST_CLK_HSIcmd(ENABLE);
RST_CLK_HSEconfig(RST_CLK_HSE_ON); // Enable HSE clock oscillator

RST_CLK_CPU_PLLconfig (RST_CLK_CPU_PLLsrcHSEdiv2,RST_CLK_CPU_PLLmul13);

RST_CLK_CPU_PLLcmd(ENABLE); // Enable CPU_PLL
RST_CLK_CPU_PLLuse(ENABLE);// Set CPU_C2_SEL to CPU_PLL output instead of CPU_C1 clock
RST_CLK_CPUclkPrescaler(RST_CLK_CPUclkDIV1);// Set CPU_C3_prescaler to 1
RST_CLK_CPUclkSelection(RST_CLK_CPUclkCPU_C3); // Select CPU_C3 clock on the CPU clock MUX
/* Enable peripheral clocks --------------------------------------------------*/
RST_CLK_PCLKcmd((RST_CLK_PCLK_RST_CLK | RST_CLK_PCLK_ADC),ENABLE);
RST_CLK_PCLKcmd((RST_CLK_PCLK_PORTD | RST_CLK_PCLK_PORTF),ENABLE);
/* Init NVIC */
SCB->AIRCR = 0x05FA0000 | ((uint32_t)0x500);
SCB->VTOR = 0x08000000;
/* Disable all interrupt */
NVIC->ICPR[0] = 0xFFFFFFFF;
NVIC->ICER[0] = 0xFFFFFFFF;
/* Enable ADC interrupt */
NVIC->ISER[0] = (1<<ADC_IRQn);
/* Reset PORTD settings */
PORT_DeInit(MDR_PORTD);
/* Reset PORTF settings */
PORT_DeInit(MDR_PORTF);
/* Configure ADC pin: ADC2 */
/* Configure PORTD pin 2 */
PORT_InitStructure.PORT_Pin = PORT_Pin_2;
PORT_InitStructure.PORT_OE = PORT_OE_IN;
PORT_InitStructure.PORT_MODE = PORT_MODE_ANALOG;
PORT_Init(MDR_PORTD, &PORT_InitStructure);
/* Configure PORTF pins 0, 1 for output to switch LED1,2 on/off */
/* Configure PORTF pins 0, 1 */
PORT_InitStructure.PORT_FUNC = PORT_FUNC_PORT;
PORT_InitStructure.PORT_Pin = PORT_Pin_0 | PORT_Pin_1;
PORT_InitStructure.PORT_OE = PORT_OE_OUT;
PORT_InitStructure.PORT_MODE = PORT_MODE_DIGITAL;
PORT_InitStructure.PORT_SPEED = PORT_SPEED_SLOW;
PORT_Init(MDR_PORTF, &PORT_InitStructure);
/* ADC Configuration */
/* Reset all ADC settings */
ADC_DeInit();
ADC_StructInit(&sADC);
ADC_Init (&sADC);
ADCx_StructInit (&sADCx);
sADCx.ADC_ClockSource = ADC_CLOCK_SOURCE_CPU;
sADCx.ADC_SamplingMode = ADC_SAMPLING_MODE_SINGLE_CONV;
sADCx.ADC_ChannelSwitching = ADC_CH_SWITCHING_Disable;
sADCx.ADC_ChannelNumber = ADC_CH_ADC2;
sADCx.ADC_Channels = 0;
sADCx.ADC_LevelControl = ADC_LEVEL_CONTROL_Enable;
sADCx.ADC_LowLevel = L_Level;
sADCx.ADC_HighLevel = H_Level;
sADCx.ADC_VRefSource = ADC_VREF_SOURCE_INTERNAL;
sADCx.ADC_IntVRefSource = ADC_INT_VREF_SOURCE_INEXACT;
sADCx.ADC_Prescaler = ADC_CLK_div_8;
sADCx.ADC_DelayGo = 0xF;
ADC1_Init (&sADCx);
/* Enable ADC1 EOCIF and AWOIFEN interrupts */
ADC1_ITConfig((ADCx_IT_END_OF_CONVERSION | ADCx_IT_OUT_OF_RANGE), ENABLE);
/* ADC1 enable */
ADC1_Cmd (ENABLE);
/*SysTick settings-------------------------------------------------------------------------------------------------------*/
SysTick_Config(9750);
while(1)
{
if (ReadyToProcess==1)
{
//PORT_SetBits(MDR_PORTF, PORT_Pin_1);
ReadyToProcess=0;
for (i=0; i<Nfft; i++)
{
InputBuffer2[2*i]=InputBuffer[i];
InputBuffer2[2*i+1]=0;
}
arm_q15_to_float(InputBuffer2,testInput_f32,2*Nfft);
/* Process the data through the CFFT/CIFFT module */
arm_cfft_f32(&arm_cfft_sR_f32_len1024, testInput_f32, ifftFlag, doBitReverse);
/* Process the data through the Complex Magnitude Module for
calculating the magnitude at each bin */
arm_cmplx_mag_f32(testInput_f32, testOutput, fftSize);
/* Calculates maxValue and returns corresponding BIN value */
testOutput[0]=0.0;
arm_max_f32(testOutput, fftSize/2, &maxValue, &testIndex);

if ((testIndex>255)&&(testIndex<257))
{
/* Turns LED1 On */
PORT_SetBits(MDR_PORTF, PORT_Pin_0);
}
else{
/* Turns LED1 Off */
PORT_ResetBits(MDR_PORTF, PORT_Pin_0);
}
//PORT_ResetBits(MDR_PORTF, PORT_Pin_1);
}
}
}
/**
* @brief Reports the source file ID, the source line number
* and expression text (if USE_ASSERT_INFO == 2) where
* the assert_param error has occurred.
* @param file_id: pointer to the source file name
* @param line: assert_param error line source number
* @param expr:
* @retval None */
#if (USE_ASSERT_INFO == 1)
void assert_failed(uint32_t file_id, uint32_t line)
{
/* User can add his own implementation to report the source file ID and line number.
Ex: printf("Wrong parameters value: file Id %d on line %d\r\n", file_id, line) */
/* Infinite loop */
while (1)
{
}
}
#elif (USE_ASSERT_INFO == 2)
void assert_failed(uint32_t file_id, uint32_t line, const uint8_t* expr);
{
/* User can add his own implementation to report the source file ID, line number and
expression text.
Ex: printf("Wrong parameters value (%s): file Id %d on line %d\r\n", expr, file_id, line) */
/* Infinite loop */
while (1)
{
}
}
#endif /* USE_ASSERT_INFO */
/** @} */ /* End of group ADC_AnalogWatchdog_93 */
/** @} */ /* End of group __MDR32F9Q3_EVAL */
/** @} */ /* End of group __MDR32F9Qx_StdPeriph_Examples */
/******************* (C) COPYRIGHT 2011 Milandr *********/
/* END OF FILE main.c */

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